1. Field of Art
The disclosure relates to the field of circuit design and circuit simulation, in particular of circuits comprising sequential logic circuitry. In more detail, the invention relates to a method, a computer-program product for use in conjunction with a computer system, an integrated circuit and a computer system for reconstructing at least one output signal associated to a sequential logic circuitry block of a circuit.
2. Description of the Related Art
Simulations of circuits are, for example, used during the design of circuits, in particular integrated circuits. To this end, for example hardware description language, HDL, simulations may be used for example for functional verification or debugging of the circuit design.
Storing or dumping of HDL signal values into a storage file, for example a dump file, may be an important part of a verification process, for example during functional verification. The functional verification may for example be part of an electronic design automation, EDA, process. The HDL signals being stored or dumped may for example be displayed as waveforms using a waveform viewer or an HDL debug tool, for example a debug graphical user interface, GUI, which may be used for example by Design/Verification engineers for the sake of debugging.
Storing or dumping signals may, however, increase the storage file size and HDL simulation time. In this respect, dumping of outputs driven by sequential logic may be of particular relevance.